ASML preps new $400 million machine to create next-generation chips

ASML, a semiconductor industry and stock market giant is now preparing to roll out a new $400 million machine for next-generation chips which it hopes will be its flagship by the late 2020s but for now remains an engineering challenge.

An optical system is prepared for testing in a vacuum chamber at Carl Zeiss SMT in Oberkochen, Germany, in this undated handout photo. Zeiss is developing optical systems that will go into the newest tool being developed by ASML of the Netherlands to create a new generation of computer chips. Helmut Issler ZEISS/Handout via Reuters
An optical system is prepared for testing in a vacuum chamber at Carl Zeiss SMT in Oberkochen, Germany, in this undated handout photo. Zeiss is developing optical systems that will go into the newest tool being developed by ASML of the Netherlands to create a new generation of computer chips. Helmut Issler ZEISS/Handout via Reuters

Toby Sterling for Reuters:

It is building machines the size of double-decker buses, weighing over 200 tonnes, in its quest to produce beams of focused light that create the microscopic circuitry on computer chips used in everything from phones and laptops to cars and AI.

The company has enjoyed a rosy decade, its shares leaping 1,000% to take its value past 200 billion euros as it swept up most of the world’s business for these lithography systems.

Executives at ASML’s headquarters in the Dutch town of Veldhoven told Reuters a prototype was on track to be completed in the first half of 2023. They said the company and longtime R&D partner IMEC were setting up a test lab on the spot – a first – so top chipmakers and their suppliers can explore the machine’s properties and prepare to use production models as early as 2025.

Industry specialist Dan Hutcheson of VLSI Research, who is not involved with the ASML project, said the new technology – known as a “High-NA” version of EUV – could provide a significant advantage to some chipmakers… He said TSMC eclipsed its rivals by integrating ASML’s EUV machines first in the late 2010s – a mistake Intel CEO Pat Gelsinger has vowed not to make again with High-NA.

MacDailyNews Take: High-NA promises a 66% reduction in chip circuitry. In other words, a revolution – if it works.

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3 Comments

  1. 66% is impressive, but this is mostly marketing fluff. In a decade they “hope” to achieve a 66% circuitry reduction, not on day-one. If 4nm is the “marketing term” for an xyz process, a 50% reduction is 2nm, which would put this technology close to it’s maximum die shrink capabilities…

    Thus, expect a 3nm ability to arrive sometimes in 2027 or so, and 2nm sometime in the early 2030’s or so…

    This isn’t going to be a “leapfrog” thing on day one. Rather, it will just allow the continuation and gradual improvements to progress. Right now, everything is close to stalling out, while this helps to re-ignite and continue circuitry shrink.

  2. This is all beyond my understanding but I seem to remember reading a while back Intel in its strategic road map claiming at some point going sub 1nm, didn’t claim when mind or do I know what needs to happen technologically to enable it if this process would not.

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