Mysteries abound in analysis of Apple’s bold new iPad-powering A5

Apple’s “A5 die is dramatically larger than the A4,” Paul Boldt and Don Scansen report for EETimes. “Both UBM Techinsights and Chipworks found the A5 die to be 12.1 mm x 10.1 mm, giving a die size of 122 mm2. This compares to 53 mm2 for the A4. The die size of the A5 is therefore 2.3 x larger than the A4.”

“Let’s look closer at the A4 and A5 floorplans and consider what might be behind such a dramatic increase in die size for the A5,” Boldt and Scansen report.

“If you were Apple what would your strategy be? We do know there is quite a bit of real estate on the A5 beyond the CPU+GPU+arbitration, and the necessary IP blocks for memory control, I/O etc. So what to do with this extra real estate… Bold is the only word that can be used to describe Apple’s A5. It was bold to design such a large device. Certainly the CPU+GPU combination is significantly larger than the comparable portion of the A4. However, this is only the beginning of the story. Going beyond these basic elements leaves an additional 34 mm2 or 64 percent of the whole A4 die. Yes, there are very likely additional IP cores there, but there might also be some clever custom design that leverages Apple’s integrated approach.”

Boldt and Scansen report, “Apple likely plans to venture further down the road of custom circuit design. Going beyond the need to remain generic and flexible to accommodate the broadest possible OS market might produce revolutionary hardware-software platforms.”

Much, much more in the full article – recommended – here.


  1. The “whole widget” approach certainly demands that apple eventually control its own destiny in this way.
    Furthering the “post PC era” which, by the way, is the most deliciously evil phrase to come out of Cupertino in ages, is their drift from commodity components. It’s near impossible to clone a device made from parts exclusive to one party.

  2. You have to love this. Apple leaves open chip real-estate, owns a chip development group, can buy any company or technology with their billions in the bank to fill the chip’s open surface, cutting it’s power consumption, cost and making it faster. Innovative Apple is years ahead of these clueless box makers that think they can jump into Apple’s device markets.

    And they don’t even know what Apple’s next few devices or markets will be. Tsunami coming. Battle is over and Apple won!

  3. I am not sure how accurate this article is, since from the start authors obviously confuse Intrinsity with P.A. Semi, asserting that there was not enough time for P.A.Semi’s input to appear in A4 — while it is not so since P.A.Semi was bought quite time ago, comparing to Intrinsity.

    1. Also, contrary to what suggested in the article, there never was a way to “reverse engineer” any of P.A. Semi designs, since these are about low-level design, nothing of which could be seen via electronic microscope unless you magnify it to the level of small groups of transistors, which is unrealistic due to huge size of this SoC.

      Another point: Samsung did not “migrate” to Tegra 2, it accepted this NVidia’s design alongside with their own ARM designs.

    1. If I’m not mistaken the dual cores in a dual core chip are wafer thin and stacked on top of each other so being dual core wouldn’t take up much space. Like stacking pancakes on a plate. It’s all the extra space around the cores that the author is talking about.

      1. I take it back, I looked at the article and there’s a picture. It looks like the cores in the A5 are right next to each other but both cores together are about the size as the single core in the A4. There’s just a bunch of extra unnamed blocks of stuff around the cores.

  4. I don’t know, but here is what I hope is on that chip:

    1 some extra small gpgpus for opencl

    2 the stuff required to run a full version of Mac OS (re-compiled for the “arm apple darwin a8” of course)

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