TSMC ‘on track’ for testing 3nm Apple Silicon processors this year

TSMC say it is on track to move 3-nanometer (3nm) process technology to risk production in 2021 followed by volume production in the second half of 2022. Risk production is the move from internal testing to using the new process on actual customer designs.

Apple’s M1 is the first personal computer chip built using 5nm process technology and is packed with 16 billion transistors, the most Apple has ever put into a chip. It features the world’s fastest CPU core in low-power silicon, the world’s best CPU performance per watt, the world’s fastest integrated graphics in a personal computer, and breakthrough machine learning performance with the Apple Neural Engine. As a result, M1 delivers up to 3.5x faster CPU performance, up to 6x faster GPU performance, and up to 15x faster machine learning, all while enabling battery life up to 2x longer than previous-generation Intel-handicaped Macs.

Monica Chen and Jessie Shen for DigiTimes:

TSMC“Our N3 technology development is on track with good progress,” said TSMC CEO CC Wei at the company’s earnings conference call on January 14. “We are seeing a much higher level of customer engagement for both HPC and smartphone application at N3 as compared with N5 and N7 at a similar stage.”

TSMC also set its capex target at US$25-28 billion, far higher than the US$20-22 billion estimated mostly by market observers.

Asked if the capex hike is for outsourcing demand from Intel, Wei said the company does not comment on specific customers and orders.

MacDailyNews Take: 3nm. How low can we go?!


  1. MDN: “3nm. How low can we go?!”

    At about 1 nm CMOS starts to be subject to oddities like quantum tunneling among other things. When will CMOS fail? 1 nm? 0.7 nm? 0.5 nm? No one knows, but some theorize. No one knows, but it will happen.

    But never fear. There are other technologies waiting in the wings that will keep things going.

    CMOS has had a very long run (compared to its predecessors of PMOS and NMOS), but things will start to get more constrained for CMOS within 10 years.

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