Apple Silicon supplier TSMC on Wednesday unveiled its newest semiconductor process, advanced packaging, and 3D IC technologies for powering the next generation of AI innovations with silicon leadership at the Company’s 2024 North America Technology Symposium. TSMC debuted the TSMC A16 (1.6nm) technology, featuring leading nanosheet transistors with innovative backside power rail solution for production in 2026, bringing greatly improved logic density and performance. TSMC also introduced its System-on-Wafer (TSMC-SoW™) technology, an innovative solution to bring revolutionary performance to the wafer level in addressing the future AI requirements for hyperscaler datacenters.
“We are entering an AI-empowered world, where artificial intelligence not only runs in data centers, but PCs, mobile devices, automobiles, and even the Internet of Things,” said TSMC CEO Dr. C.C. Wei in a statement. “At TSMC, we are offering our customers the most comprehensive set of technologies to realize their visions for AI, from the world’s most advanced silicon, to the broadest portfolio of advanced packaging and 3D IC platforms, to specialty technologies that integrate the digital world with the real world.”
TSMC A16 Technology: With TSMC’s industry-leading N3E technology now in production, and N2 on track for production in the second half of 2025, TSMC debuted A16, the next technology on its roadmap. A16 will combine TSMC’s Super Power Rail architecture with its nanosheet transistors for planned production in 2026. It improves logic density and performance by dedicating front-side routing resources to signals, making A16 ideal for HPC products with complex signal routes and dense power delivery networks. Compared to TSMC’s N2P process, A16 will provide 8-10% speed improvement at the same Vdd (positive power supply voltage), 15-20% power reduction at the same speed, and up to 1.10X chip density improvement for data center products.
Hartley Charlton for MacRumors:
TSMC is also making progress toward manufacturing 2nm and 1.4nm chips that are likely destined for future generations of Apple silicon. Its 2nm “N2” node is scheduled for trial production in the second half of 2024 and mass production in late 2025, to be followed by an enhanced “N2P” process in late 2026. Trial production of the 2nm node will begin in the second half of 2024, with small-scale production ramping up in the second quarter of 2025. In 2027, facilities in Taiwan will start to shift toward production of “A14” 1.4nm chips.
Apple’s upcoming A18 chips for the iPhone 16 lineup are expected to be based on N3E, while the “A19” for the 2025 iPhone models is expected to be Apple’s first 2nm chip. The subsequent year, Apple will likely move to an enhanced version of this 2nm node, followed by the newly announced 1.6nm process.
Support MacDailyNews at no extra cost to you by using this link to shop at Amazon.
MacDailyNews Note: In January, DigiTimes reported that Apple will, unsurprisingly, be the first company to receive chips built on the TSMC’s future 2-nanometer process.
Please help support MacDailyNews. Click or tap here to support our independent tech blog. Thank you!
Support MacDailyNews at no extra cost to you by using this link to shop at Amazon.
