Apple supplier TSMC is making a $19 billion bet on 3nm – and that means faster iPhones are on the way

“TSMC is now Apple’s primary processor manufacturing partner, churning out 7-nanometer (nm) A13 chips for iPhones – and it may be producing 3nm chips for iPhones by 2023,” Jonny Evans writes for Computerworld:

It’s thought that Apple will migrate to 5nm processors in 2020 following comments from TSMC CFO Lora Ho, who revealed his company has become “more aggressive” on the move to manufacture these chips… This should be useful as Apple attempts to handle the new power requirements of 5G solutions as it begins to field them in late 2020.

TSMC has begun construction of a 3nm fabrication facility at the Southern Taiwan Science and Technology Park, Tainan, Taiwan. This is a huge investment – figures approaching $20 billion are cited – and mass production is expected to begin by late 2022 or early 2023. That’s right on schedule for a follow-up to next year’s anticipated 5nm A14 (if speculation matches reality).

MacDailyNews Take: We can’t wait to see the first Apple-powered Mac!

Think code convergence (more so than today) with UI modifications per device. A unified underlying codebase for Intel, Apple A-series, and, in Apple’s labs, likely other chips, too (just in case). This would allow for a single App Store for Mac, iPhone, and iPad users that features a mix of apps: Some that are touch-only, some that are Mac-only, and some that are universal (can run on both traditional notebooks and desktops as well as on multi-touch computers like iPhone, iPad, iPod touch, and – pretty please, Apple – Apple TV). Don’t be surprised to see Apple A-series-powered Macs, either.MacDailyNews Take, January 9, 2014

4 Comments

  1. I didn’t think 3nm tech was possible using silicon. However, it sounds sweet. A future A15 SoC with 20B transistors would really pack some serious processing power.

    1. TSMC’s 3 nm is equivalent to Intel’s 5 nm. The two companies use different scale factors to state what their node values are.

      The reality is that it’s a “3 nm manufacturing node”. There are many different feature sizes that go into manufacturing chips at that node.

      The 5 nm node by Intel’s scaling factors is the point at which things start to get “interesting” with electron tunneling and leakage runaway. Going smaller than that, at least according to current theory, will take huge efforts to contain and minimize the negative effects of going to smaller feature sizes. There are some that will claim it is even impossible to do with silicon or even alternates like GaAs.

      I do not expect to see a 3 nm node by Intel’s scaling factors (likely called a 2 nm node by TSMC’s scaling factors) before 2030 — if ever.

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