ARM announces 2GHz-capable Cortex-A9 dual core processor implementation

ARM announced today the development of two Cortex-A9 MPCore hard macro implementations for the TSMC 40nm-G process, enabling silicon manufacturers to have a rapid and low-risk route to silicon for high-performance, low-power Cortex-A9 processor-based devices. The speed-optimized hard macro implementation will enable devices to operate at frequencies greater than 2GHz.

The dual core hard macro implementations are the result of ARM’s significant investment in advanced physical IP development in unison with processor and fabric IP technology, and leading-edge implementation flows from the EDA industry. Advanced physical IP techniques have enabled critical circuits within the design to be replaced with highly tuned logic cells and memories, increasing performance while lowering overall power consumption.

Speed Optimized
The Cortex-A9 speed-optimized hard macro implementation will provide system designers with an industry standard ARM processor incorporating aggressive low-power techniques to further extend ARM’s performance leadership into high-margin consumer and enterprise devices within the power envelope necessary for compact, high-density and thermally constrained environments. This hard macro implementation operates in excess of 2GHz when selected from typical silicon and represents an ideal solution for high-margin performance-oriented applications.

Power Optimized
In many thermally constrained applications such as set-top boxes, DTVs, printers and other feature-rich consumer and high-density enterprise applications, energy efficiency is of paramount importance. The Cortex-A9 power-optimized hard macro implementation delivers its peak performance of 4000 DMIPS while consuming less than 250mW per CPU when selected from typical silicon.
The hard macro implementations include ARM AMBA-compliant high performance system components to maximize data traffic speed and minimize power consumption and silicon area. Each Cortex-A9 hard macro implementation also includes the CoreSight Program Trace Macrocell (PTM) which provides full visibility into the processor’s instruction flow, enabling the software community to develop code for optimal performance.

“The Cortex-A9 MPCore processor has already been widely accepted as the processor of choice for high-performance embedded applications across a broad spectrum of demanding consumer and enterprise devices,” said Eric Schorn, VP marketing, Processor Division, ARM, in the press release. “ARM’s parallel development of advanced, optimized physical IP components demonstrates a new level of collaborative differentiation while enabling our Partners to expand their penetration into high margin domains traditionally occupied by proprietary architectures.”

“ARM’s long-standing investment in low-power leadership and ability to develop such high-performance devices enables licensees to lower the cost and risk of entering the high-margin markets currently addressed with competing proprietary solutions,” said Will Strauss, principal analyst at Forward Concepts, in the press release. “With single-thread performance capable of supporting very intensive workloads, the unprecedented level of power efficiency will enable licensees to introduce compelling new products.”

“ARM and TSMC have enjoyed a long standing relationship of collaboration to ensure the development and delivery of best-in-class products optimized for our manufacturing process,” said ST Juang, Sr. Director, Design Infrastructure Marketing Division, TSMC, in the press release. “This provides OEMs developing feature-rich consumer and enterprise devices access to TSMC’s manufacturing excellence and the power of ARM processor IP”

Both ARM dual core Cortex-A9 hard macros will share a common seven-power domain, dual-NEON™ technology configuration supporting SMP (symmetrical multiprocessing) operating systems with up to 8MB of Level2 cache memory and will be delivered with all scripts, vectors and libraries required to integrate the macro directly within any SoC device.

To enable the development of high-efficiency, low risk SoCs using other Cortex-A9 processor configurations, ARM also provides the silicon-proven SoC-level ARM Physical IP platform used to build these hard macros, and a range of AMBA-compliant system development components and tools.

In addition, the ARM Active Assist consulting service, developed in conjunction with the hard macros, enables ARM Partners to efficiently integrate the hardened macro into their SoC design to realize maximum system performance with lowest risk and fastest time-to-market.

Availability
The Cortex-A9 hard macros and the corresponding optimized physical IP used to develop the speed-optimized and power-optimized implementations are available for license today with delivery in the fourth quarter of 2009. ARM’s 40G physical IP platform is also available today at designstart.arm.com.

ARM designs the technology that lies at the heart of advanced digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices. ARM’s comprehensive product offering includes 32-bit RISC microprocessors, graphics processors, video engines, enabling software, cell libraries, embedded memories, high-speed connectivity products, peripherals and development tools. Combined with comprehensive design services, training, support and maintenance, and the company’s broad Partner community, they provide a total system solution that offers a fast, reliable path to market for leading electronics companies. More information on ARM is available at http://www.arm.com.

Source: ARM Limited

29 Comments

  1. My brain tends to melt anytime I read press release posing as an article (Source: ARM Limited).

    One would reasonably expect some MDN commentary on the relevance/potential for implementation of this ARM processor on Apple mobile hardware, such as the iPhone, as a follow-up to this press release.

    The biggest question in my mind is the state of progress on Apple-specific products at PA Semi. My guess is that Apple is just treading water with incremental ARM processor speed updates in the iPhone and iPod touch until their PA Semi investment bears fruit. Then you will see Apple mobile devices take a big leap in performance, graphics, and battery life that other “smartphone” makers will not be able to duplicate.

  2. If the price is low enough, look for new Linux netbooks and tablets to begin surfacing. Windows does not run on ARM, and MS says that it is refusing to port it. This will open the door for Linux and Apple to step into fully-functional, low-cost computers that have great battery life, and aren’t hobbled by slow processors that are based on old technology (Intel Atom). Both Linux and Apple are built for SMP and with OpenCL & Grand Central Station open sourced, both will be far ahead of anything MS can do in this market. Apple always skates to where the puck is going to be. Look for MS to spend the next two years talking about the next generation WinCE that will be built from the ground up with SMP support, and all kinds of other “advanced” features. Then they’ll release a patched-together version of the existing CE kernel that barely functions, and they’ll introduce it like it was the greatest innovation since the PC. By then, Apple will have a much larger chunk of the market, and they will be introducing the next great revolution in computing. Linux will be where Apple is now in terms of market share, and MS will start writing apps for the Linux platform.

    Schadenfreude is very satisfying sometimes.

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