“Intel has built a prototype of a processor with 80 cores that can perform a trillion floating-point operations per second,” Tom Krazit reports for CNET News.
“CEO Paul Otellini held up a silicon wafer with the prototype chips before several thousand attendees at the Intel Developer Forum here Tuesday. The chips are capable of exchanging data at a terabyte a second, Otellini said during a keynote speech. The company hopes to have these chips ready for commercial production within a five-year window,” Krazit reports.
Krazit reports, “Intel announced plans to have quad-core processors ready for its customers in November. An extremely fast Core 2 Extreme processor with four cores will be released then, and the newly named Core 2 Quad processor for mainstream desktops will follow in the first quarter of next year, Otellini said.”
“During the next few years, Intel wants to improve the performance per watt of power consumption of its transistors by 300 percent through new manufacturing technologies and designs, Otellini said. The next step on that road, Intel’s 45-nanometer manufacturing technology, will enable the company to build chips that deliver a 20 percent improvement in performance with five times less current leakage, he said,” Krazit reports.
Krazit reports, “But the ultimate goal, as envisioned by Intel’s terascale research prototype, is to enable a trillion floating-point operations per second–a teraflop–on a single chip. Ten years ago, the ASCI Red supercomputer at Sandia National Laboratories became the first supercomputer to deliver 1 teraflop using 4,510 computing nodes.”
Full article here.
[Thanks to MacDailyNews Reader “LinuxGuy and Mac Prodigal Son” for the heads up.]
MacDailyNews Take: Imagine that, a single processor that’ll be nearly capable of fully running Microsoft’s bloated Windows Aero interface.
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